1. Field of the Invention
The present invention relates to a master device and related clock synchronization method, and more particularly, to a master device in an Ethernet system and related synchronization method.
2. Description of the Prior Art
Even if no data transmission takes place in a Gigabit Ethernet system, a master device and a slave device must synchronize by sending idle sequences. Nevertheless, continuously sending idle sequences causes too much power consumption when no data is transmitted. Thus, the Institute of Electrical and Electronics Engineers (IEEE) regulates an Energy Efficient Ethernet (EEE) specification for power saving purposes. Under the EEE specification, both the master and slave device enter a sleep mode, only waking up occasionally to send the idle sequences for synchronization, when the master device does not have data for transmission.
Regarding an Ethernet system, the slave device executes a timing recovery according to signals received. For example, a transmitter of the master device uses a free running clock for data transmission. The slave device executes the timing recovery to generate a recovery clock identical to a free running clock of the master device after the receiver of the slave device receives the transmitted signals. The transmitter and the receiver of the slave device individually transmit and sample signals according to the recovery clock. When the receiver of the master device receives the signals, transmitted based on the recovery clock, from the slave device, the receiver performs synchronization and optimizes clock phase for sampling.
To save power, there are two kinds of mechanisms for the Gigabit Ethernet in the sleep mode, namely symmetric and asymmetric mechanisms. In the case of the symmetric mechanisms, the master and the slave device both enter the quiet mode when no data is transmitted. And, both of them wake up when either the master or the slave device has to transmit data. During awakening, the master device is in control of leaving the quiet mode. All the slave device needs to do is to make a wake-up request. When the data transmission is one-way transmission and the master/slave is transmitting data, but the other one is not, the master and the slave device must wake up and enter the sleep mode together. The master device or the slave device is allowed to enter the quiet mode independently, thus causing extra power consumption.
The asymmetric mechanism includes the following two situations: First, the master device continuously sends data to the slave device when the slave device is operated in the quiet mode. Since the slave device receives the data from the master device and performs the timing recovery, the synchronization between the master and the slave device can still be achieved. Second, the slave device continuously sends data to the master device when the master device is operated in the quiet mode. In this situation, the slave device cannot execute the timing recovery due to no data being received from the master device. As time passes by, clock drift occurs, since the slave device has not received the free running clock from the transmitter of the master device, thereby causing the timing recovery not to be performed. When the master device wakes up for the first transmission, the transmitter of the master device cannot know how many phases the slave device's clock, received by the receiver of the master device, has drifted during this period. Therefore, the master device cannot accordingly adjust its clock for transmission to correspond to the phase drift of the data received.
To put it simply, the master device cannot synchronize with the slave device after waking up from a long sleep in the quiet mode. This causes a data reception error for the slave device.